In telecom circuits it is very common to map low speed tributaries into a high speed signal such that high bandwidth traffic can be routed from one node to another node using sonet/SDH framed data on optical fiber. Add/drop multiplexers are deployed on the network interface cards to support such mapping and demapping functions. There are several challenges in this process:                1. In an asynchronous mapping procedure, the reference clocks for high speed sonet/SDH and low speed tributaries are not derived from same reference.        2. There is always a difference in frequency of clocks that are used to map the low speed tributaries and the high speed signal. These differences are referred to as a PPM (parts per million) difference in the reference clocks of these signals. For example DS1/E1 clocks can have frequency between +/−32 PPM and sonet/SDH signal can have frequencies between +/−20 PPM. This results in stuffing and destuffing bits within low speed tributaries if they are mapped or demapped asynchronously. This also introduces payload pointer and the payload pointer's movement with respect to line overhead bytes or virtual tributary path overhead bytes.        3. The noise in the network and different clock sources introduces low frequency wander which ranges below 10 Hz. This wander is not exactly periodic in single frequency but varies between 0 to 10 Hz.        4. This ultimately creates gapped and jittery demapped clock at the output of demapper circuit which demaps low speed tributary such as DS1/E1 signal from high speed sonet/SDH signal such as STS-1/STM-0.        
Prior systems have used analog elements to deal with the gapped and jittery demapped clock at the output of the demapper circuit. These systems can be expensive and dependent on the semiconductor processes used to produce the analog elements.